Conventional microprocessor-based systems communicate with peripheral devices through the data and address buses and a variety of control signals. Complex microprocessor-based systems may also comprise coprocessors capable of performing specific tasks more efficiently than the microprocessor itself. For example, floating point coprocessors have been used extensively in the IBM compatible personal computer environment which utilizes Intel microprocessor-based systems.
In general, during operation of these systems, the arithmetic coprocessor will examine the information present on the address and data buses and various control signals to determine if a particular instruction present on either of the buses may be executed by the coprocessor. Two basic methods of communicating instructions to arithmetic coprocessors have been used in the past. The first method is to treat the arithmetic coprocessor as a conventional input/output [I/O] peripheral device. Using this method of communication, an instruction is first transmitted to the coprocessor on the data bus. Any operands associated with the instruction are subsequently transmitted to the coprocessor on the same data bus. The second method of communicating instructions to arithmetic coprocessor involves the concept of memory mapped instructions. Using this method of communication, the microprocessor utilizes a WRITE instruction and writes data to a particular location in its logical address space. The coprocessor is actually resident in a particular block of logical address space. Each position in the logical address space associated with the coprocessor is associated with a different instruction. In this manner, a WRITE of a particular data value to a particular location may result, for example, in the calculation of the cosine of the data value. This method of communication is very efficient in that the instruction is communicated to the coprocessor on the address bus while the data associated with the instruction is simultaneously communicated on the data bus. This has a result of effectively doubling the bandwidth of communication within the integrated system.
Arithmetic coprocessors have been developed which utilize either of these communication formats. However, no arithmetic coprocessor has been developed which is capable of recognizing and processing instructions sent in both I/O instruction format and memory mapped instruction format. Accordingly, a need has arisen for an arithmetic coprocessor interface which is capable of recognizing and processing both formats of instructions.